1. Field of the Invention
The present invention relates to semiconductor integrated circuit technologies. More particularly, the present invention relates to an electrostatic discharge event detector which can record any ESD event occurring during the phases of testing, assembly, installation, operation, and so on.
2. Description of the Related Art
Electrostatic discharge, ESD hereinafter, may occur anytime during the phases of testing, assembly, installation, operation, etc., and cause damage to integrated circuits (ICs). Thus, as for semiconductor integrated circuitry, an ESD protection circuit is generally provided in close proximity to the integrated circuit pads to protect an internal circuit (also referred to as core circuitry) from ESD damage.
Most conventional ESD protection circuits are constituted by, for example, diodes, field devices (transistors formed on field oxides), lateral silicon-controlled rectifiers, or low voltage triggering silicon-controlled rectifiers (LVTSCR). In general, the conventional ESD protection circuit should be triggered at a voltage lower than the breakdown voltage of those devices contained in the internal circuit most vulnerable to ESD damage. The conventional ESD protection circuit is triggered to conduct a discharge current and thus keep the ESD stress far away from the internal circuit.
However, other than the situation in which the ESD stress causes permanent damage to the ESD protection circuit, there is no way of knowing whether or not ESD stress occurred during the phase of testing, assembly, installation, operation, etc. In other words, the conventional ESD protection circuit can not record the ESD event without failure.